Microsoft is hiring a Design Verification Engineer II in India to verify silicon IP for its hardware programmes. You will help ensure that complex CPU or SoC IP meets tape-out requirements by building testbenches, generating stimulus and running UVM- or C++-based verification environments, and working with design and architecture teams through verification closure.
Requirements: 3 or more years of design verification experience with a track record of delivering complex CPU or SoC IP, solid knowledge of verification principles, testbenches and stimulus generation, UVM or C++ test environments, and a good understanding of computer architecture. The posting lists multiple locations in India.